WEBVTT

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The constraints table tells us
which facts the documents support.

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Now we will turn those
facts into a small interface

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plan and a software acquisition contract.

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Stay in checkpoint four and
keep your reviewed table open.

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This is a documentation exercise
for an optional physical extension.

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The required project will
still use synthetic input,

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so no wiring or upload is
needed to complete the lesson.

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Start the drawing with two
separate boxes. Name the exact

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host board above one and the separate
sensor breakout above the other.

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Do not replace those
identities with a broad family

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name after doing the
work to establish them.

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The drawing should describe
the same example as the README,

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hardware reference,
and dependency manifest.

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A correct connection attached to the
wrong variant is still misleading context.

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Use the named connector signals
from the applicable references.

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At this level, we need clock, data, the
documented connector supply, and ground.

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Trace the corresponding
endpoint on the breakout.

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The intended connection uses
a compatible keyed cable.

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Do not insert remembered GPIO
numbers, unsupported wire colors,

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or assumptions from a
photograph of a similar board.

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Every added detail becomes
another factual claim to review.

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Place a clear label on the
plan: documentation based,

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physical assembly unverified. This
is not a decorative disclaimer.

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It tells the next person what kind
of evidence the drawing represents.

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The source can support an intended
connection, while actual orientation,

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cable condition, board revision, and
physical operation remain unobserved.

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A diagram does not become a bench
result because it is carefully drawn.

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Check one connection at a time.

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Follow clock from the host
endpoint to the sensor endpoint,

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then do the same for data.

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Check the supply connection
and return path separately.

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Keep the source section beside each
check so a reviewer can repeat it.

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Reading all four lines as a
group makes it easier to miss

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a swapped endpoint or an assumption
copied from another interface.

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When a schematic label
is too small to read,

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enlarge the actual source or
locate a readable pinout companion.

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An assistant may help find
the relevant material,

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but guessing the label from a blurred
image does not resolve the uncertainty.

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If the endpoint is not
established, mark it unresolved.

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A clearly identified
gap is more useful than

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a confident line drawn to an invented pin.

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A bare-wire variation would need more
evidence than this connector-level plan.

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You would need exact pin
positions, orientation,

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supply assumptions, and
relevant interface conditions.

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Do not silently expand the keyed-cable
example into that variation.

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A changed connection method
is a changed engineering

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task, and the source
checks should grow with it.

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The core course does not require
you to perform that extension.

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Now describe what the input
adapter gives the application.

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It should produce a timestamped
temperature when acquisition succeeds,

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or an explicit indication that
a reading is missing or invalid.

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The adapter handles the acquisition
environment. The policy decides

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whether the input is current and
whether the application has recovered.

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Keeping that boundary
clear lets host replay

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exercise the same policy
without a physical sensor.

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Write down what a timestamp means.

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A fresh acquisition can carry the
time associated with that reading.

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A failed attempt must not take an old
cached value and give it a new timestamp.

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That would make stale data appear current.

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The value, its validity,
and its age belong together.

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If an assistant proposes
a fallback number,

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ask which requirement gives that invented
measurement a legitimate meaning.

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Initialization is part
of the contract as well.

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A future physical adapter
needs to establish

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a usable interface or report
initialization failure.

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It should not proceed as though
input exists when setup failed.

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The current synthetic implementation
avoids a sensor driver entirely,

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which keeps the shared
behavior small and testable.

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You can define the future
boundary now without

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claiming the future driver
has been implemented.

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The board guide also describes
switchable peripheral power.

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Before adopting a control
symbol in a physical adapter,

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inspect the selected board variant
and its pinned initialization source.

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An alias from another example
is not automatically applicable.

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If the guide and code use different names,

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record the exact question and the
evidence needed to resolve it.

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Do not hide that mismatch behind
a generic ESP32 pin number.

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Ask a separate timing question:
how long can acquisition take?

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Calling an adapter once a second does
not guarantee that its internal driver

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returns within one second. Scheduling
controls when work is requested.

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Driver timeout behavior controls
what happens inside the request.

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A physical extension needs appropriate
source and implementation evidence

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for that behavior before you
describe its acquisition as bounded.

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These unanswered
physical-driver questions do not

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prevent the required synthetic
project from moving forward.

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The host adapter can supply
controlled values and timestamps

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while the optional implementation
remains a separate task.

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The important boundary is
visible: software policy checks

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will establish behavior for supplied
inputs, while electrical operation,

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bus behavior, and measured response
timing remain outside those checks.

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In the exercise, review a
proposal that confuses scheduling

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with duration and refreshes
cached data after failed reads.

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Correct both claims in the
plan before any coding.

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The first needs an independent
acquisition-duration or timeout check.

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The second needs the
original sample age to remain

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visible or an explicit missing result.

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Neither problem is solved by making
the output look continuously normal.

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Your completed plan contains
the documented connections,

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a short adapter contract, and
specific unresolved questions.

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Each unknown names what
evidence would resolve it.

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Physical revision, jumper state,
pinned power initialization,

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selected driver version, and
actual upload or serial operation

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are useful examples when they
affect the planned extension.

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Avoid an indiscriminate list
of every conceivable risk;

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keep the questions tied to this interface.

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Finally compare the plan with the
constraints table one more time.

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Confirm that no variant,
address assumption,

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or source condition changed while
the drawing became more polished.

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Ask the assistant for a
bounded review if it helps,

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then inspect the source evidence yourself.

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In the next lesson we will implement
and run synthetic input handling,

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using this clear acquisition
boundary to keep the firmware

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change small and its
results easy to explain.
